EECS 478
Logic Circuit Synthesis and Optimization
Advanced design of logic circuits. Technology constraints. Theoretical foundations. Computer-aided design algorithms. Two-level and multilevel optimization of combinational circuits. Optimization of finite-state machines. High-level synthesis techniques: modeling, scheduling, and binding. Verification and testing. Emerging technologies. Lab projects on CAD software development.
Prerequisites & course information
[(EECS 203 or 303 or CMPTRSC 203 or 303) and (EECS 270 or CMPTRSC 270); C or better No OP/F, and Senior] or Graduate Standing. (Prerequisites enforced at registration.) (BS). May not be repeated for credit. F, W.
Sources
Catalogue variants
- Logic Circuit Synthesis and Optimization · 4 · College of Engineering catalogue
- Logic Circuit Synthesis and Optimization · Graduate credit