Digital Systems Laboratory II

3-7-2 units · Graduate

Continuation of topics introduced in 6.2050 . Focuses on modern design verification practices, System Verilog, and Universal Verification Methodology (UVM), as well as designing complex digital systems in hybrid platforms such as SoC and state-of-the-art RFSoC platforms. Students complete weekly labs and final design project with emphasis on signal processing, RF, data acquisition, and other applications. Utilizes a number of tools and areas of study reflective of the hybrid modern state of the field; usage of C, Python, shells scripts, signals and systems, communications, and RF concepts, should be expected.