VLSI CAD and Optimization
Explore interconnect and gate modeling; timing analysis; interconnect topology optimization; gate sizing; buffer insertion and sizing; wire sizing and planning; crosstalk analysis and mitigation; clock network synthesis; interconnect planning; modern placement techniques; congestion mitigation; low power optimization; design for manufacturability and reliability; design and computer-aided design (CAD) for emerging technologies. Only one of the following may be counted: Electrical and Computer Engineering 382M (Topic 26), Electrical Engineering 382M (Topic 21), 382M (Topic 26).
Prerequisites & course information
Explore interconnect and gate modeling; timing analysis; interconnect topology optimization; gate sizing; buffer insertion and sizing; wire sizing and planning; crosstalk analysis and mitigation; clock network synthesis; interconnect planning; modern placement techniques; congestion mitigation; low power optimization; design for manufacturability and reliability; design and computer-aided design (CAD) for emerging technologies. Only one of the following may be counted: Electrical and Computer Engineering 382M (Topic 26), Electrical Engineering 382M (Topic 21), 382M (Topic 26).
Sources
- Course catalogue ↗2026-2027