Superscalar Microprocessor Architectures

3 Hours

Examine superscalar processor architectures; instruction level parallelism; machine level parallelism; superscalar organization; instruction windows; reservation station; register data flow; register renaming; reorder buffers; memory disambiguation; branch prediction; value prediction; instruction reuse techniques; comparison with very long instruction word (VLIW), single instruction-multiple data (SIMD), and multiple instruction-multiple data (MIMD) approaches; memory systems for superscalar processors; design for performance and power efficiency; performance evaluation of superscalar processors; and case studies. Electrical and Computer Engineering 382N (Topic 17) and Electrical Engineering 382N (Topic 17) may not both be counted.