DESIGN AUTOMATION OF DIGITAL SYSTEMS

Prerequisites & course information

Requisites: E C E/COMP SCI 352 and COMP SCI 300 , graduate/professional standing, or member of Engineering Guest Students Repeatable for Credit: No Last Taught: Spring 2026 Learning Outcomes: 1. Identify different steps of the design flow of integrated circuits Audience: Undergraduate 2. Map a high-level netlist in Verilog to a gate-level logic circuit using a standard-cell library Audience: Undergraduate 3. Identify different steps of layout design including placement, global, and detailed routing Audience: Undergraduate 4. Perform static timing analysis in a combinational logic circuit Audience: Undergraduate 5. Identify and apply physical-synthesis techniques in integrated circuits such as gate sizing and logic restructuring Audience: Undergraduate Learning Outcomes: 1. Identify different steps of the design flow of integrated circuits Audience: Undergraduate 2. Map a high-level netlist in Verilog to a gate-level logic circuit using a standard-cell library Audience: Undergraduate 3. Identify different steps of layout design including placement, global, and detailed routing Audience: Undergraduate 4. Perform static timing analysis in a combinational logic circuit Audience: Undergraduate 5. Identify and apply physical-synthesis techniques in integrated circuits such as gate sizing and logic restructuring Audience: Undergraduate