CPSC 4480
Silicon Compilation
An upper-level course on compiling computations into digital circuits using asynchronous design techniques. Emphasis is placed on the synthesis of circuits that are robust to uncertainties in gate and wire delays by the process of program transformations. Topics include circuits as concurrent programs, delay-insensitive design techniques, synthesis of circuits from programs, timing analysis and performance optimization, pipelining, and case studies of complex asynchronous designs. Prerequisite: EENG 201 and introductory programming, or permission of instructor. MW 11:35am-12:50pm
Sources
- Course catalogue โ2026โ2027